Expert analysis of every known Apple Silicon processor β M1 through M6 (2020β2026), across Base / Pro / Max / Ultra tiers. 20 chips, deep CPUΒ·GPUΒ·bandwidthΒ·processΒ·energy-efficiency comparison.
5nm β 2nm process leapGeekbench 6 scoresChip + system efficiencyCPU / GPU / bandwidth / node
9:41πΆ π
M6 Β· 2nm
Latest Silicon12-core
Unified Mem32 GB
GB6 Multi20,417
+89%
Single-core M1βM6 (2,347β4,444)
2.1Γ
Multi-core M1 UltraβM5 Ultra
2.5Γ
Base bandwidth 68β170 GB/s
1.4Γ
Ultra bandwidth 800β1,100 GB/s
512 GB
Max unified memory (M3/M5 Ultra)
2nm
M6 β first TSMC N2
Key Takeaways (expert view)
The efficiency inflection is at 3nm. M3 (N3B) is the real leap β chip-level multi-core/W is ~50%+ above M1. M2 (N5P) actually regressed slightly in light-load efficiency vs M1 (N5), a well-known effect.
Smaller chips win on per-watt output. Base/Pro chip-level performance density (MC/W) is typically 3β5Γ that of Ultra. Ultra trades watts for bandwidth and capacity β built for the extreme.
Core topology was rebuilt at M5. The classic P+E two-tier design evolved into a Super / Performance / Efficiency three-tier layout; M6 goes 2S+4P+6E.
Bandwidth is the generational dividend. M4 skipped Ultra (no UltraFusion connector); M5 restored it at 1.2 TB/s.
AI is the new axis. NPU climbed 11β38 TOPS (M1βM4/M5); M5/M6 push a neural accelerator into every GPU core, running ~200B-parameter models locally.
1 Β· Full Specification Table
All 20 released chips. Search box above filters live. Colors mark the generation.
Chip
Gen
Tier
Year
CPU (struct)
GPU
Trans (B)
BW (GB/s)
Max Mem
Node
GB6 SC
GB6 MC
NPU
Note
Note: transistor counts per official releases; M5/M6 partial figures shown as β. GB6 = Geekbench 6 public median (multi-source). Highest config counted where options exist.
2 Β· Performance (Geekbench 6)
Multi-core scales systematically by generation and tier. Notably, M5 Max already beats M3 Ultra; M5 Ultra tops out near 38,300. M4, lacking an Ultra, has a lower multi-core ceiling than M3 Ultra.
Base chips improve single-core steadily (M1 2,347 β M6 4,444, ~+89%) via micro-architecture and frequency gains; multi-core rises as core counts grow (Base hits 10 cores from M4).
CPU/GPU core tiers: Base 8β12 / 8β12, Pro 10β18 / 16β20, Max 10β18 / 32β40, Ultra 20β36 / 64β80. M3 Pro's 18 GPU cores and 150 GB/s bandwidth is a hidden weak spot.
3 Β· Bandwidth & Process
Unified-memory bandwidth is the performance floor. Base climbs 68β170 GB/s; Ultra goes 800 (M1/M2) β 819 (M3) β 1,100 (M5, i.e. 1.2 TB/s).
Transistor counts balloon with node and die-stacking: single die 16B (M1) β 28B (M4); Ultra doubles dies to 114B+ (M1 Ultra). M5/M6 partial figures omitted.
4 Β· Energy Efficiency (the core ask)
Methodology & disclaimer: Apple never publishes TDP or power for any M chip. This report uses two angles β
(1) chip-level peak power from third-party measured package power (AnandTech / NotebookCheck / MacNerd, Cinebench/full load), method-dependent;
(2) system peak AC power from Apple's official Mac mini Environmental Report (most authoritative, but whole-system).
"Performance density = GB6 multi-core Γ· watts(W)" is a derived relative index for trend comparison only. M2 third-party peaks (50/100/145W) run high vs M1 and may include extra system margin β flagged accordingly.
Chip
Tier
Chip Peak (W)*
Chip MC/W*
System Peak (W)**
System MC/W**
* Third-party package-power estimate; missing = β. ** Apple Mac mini Environmental Report AC peak (only M1/M2/M4 Mac mini have official data).
Chip-level performance density (MC/W) shows a clear rule: smaller is more efficient. Base chips (M3β583, M4β421) far exceed Max/Ultra (M1 Ultraβ86, M2 Ultraβ73).
Efficiency findings
M2 regression: system peak 50W (M2) > 39W (M1) β lower per-watt multi-core (M1β214 vs M2β193 MC/W), confirming N5P is less efficient than first-gen N5 at light load.
3nm saves the day: M3 Base chip MC/Wβ583 is the efficiency sweet spot; M4 Base reaches ~421 despite higher 35W peak.
The Ultra cost: M1/M2 Ultra chip MC/W is only 73β86 β 1/5β1/7 of Base. They spend watts for 128β512GB unified memory + 800GB/s+ bandwidth.
AI efficiency is separate: NPU 38 TOPS at tens of watts makes local LLM inference far more efficient than CPU/GPU; M5/M6 GPU neural accelerators push AI into the graphics pipeline.
5 Β· CPU Deep Dive
Core topology evolution
M1βM4 use the classic Performance (P) + Efficiency (E) two-tier layout: Base 4P+4E (M4: 4P+6E), Pro/Max add P-cores. From M5 a Super Core (S) third tier appears β M5 Base 4S+6E, M5 Pro/Max 6S+12P, M6 2S+4P+6E. Super cores target single-thread peaks and responsiveness, driving the rising single-core scores.
Generational uplift (official / measured)
Comparison
CPU
GPU
M4 vs M1
up to ~1.8Γ
up to ~2.0Γ
M4 Pro vs M1 Pro
up to ~1.9Γ
~2.0Γ
M4 Max vs M1 Max
up to ~2.2Γ
up to ~1.9Γ
M3 vs M1 (official)
up to ~35%
up to ~65%
Source: Apple per-generation press-release relative uplift ("up to" wording; actual varies by config/load).
6 Β· GPU Deep Dive
Scale: GPU cores Base 8β12, Pro 16β20, Max 32β40, Ultra 64β80; paired with unified bandwidth, M-series graphics beat same-power x86 dGPUs decisively.
Architecture: M3 brought hardware ray tracing and mesh shading to Mac; M4 doubles ray-tracing; M5 adds a neural accelerator per GPU core.
Media engine: Pro/Max/Ultra have ProRes/HEVC/H.264 hardware codecs; Max/Ultra add multi-engine 8K ProRes; M3 adds AV1 decode.
Bandwidth ceiling: M3 Pro's 150 GB/s is its hidden graphics/AI throttle; M3 Max is clearly better for bandwidth-bound tasks.
7 Β· Generational Timeline
Gen
Debut
Node
Flagship
Milestone
M1
2020-11
5nm N5
M1 / Pro / Max / Ultra
Unified memory; ends Intel era
M2
2022-06
5nm N5P
M2 / Pro / Max / Ultra
More GPU cores; up to 192GB
M3
2023-10
3nm N3B
M3 / Pro / Max / Ultra(2025)
First 3nm; HW ray tracing
M4
2024-05
3nm N3E
M4 / Pro / Max
NPU 38 TOPS; no Ultra
M5
2025-10
3nm N3P
M5 / Pro / Max / Ultra(2026)
3-tier cores + GPU NNA
M6
2026-08
2nm N2
M6 (Pro/Max pending)
Apple first 2nm; 3-tier
8 Β· Buying Guide (by use case)
Use case
Recommend
Why
Daily / student / light creat.
M4 / M5 / M6 Base
Efficiency sweet spot; quiet; long battery; best value
Dev / editing / mid creat.
M4 Pro / M5 Pro
14β18 CPU + 273β307 GB/s; TB5; AI-friendly
3D / VFX / local LLM
M4 Max / M5 Max
40 GPU + 546β614 GB/s; ~200B-param models
Studio / HPC / huge models
M3 Ultra / M5 Ultra
512GB + 819β1,100 GB/s; only choice
Best per-watt / silent
M3 / M4 Base
Highest chip MC/W; Ultra is "power hungry"
9 Β· Risks, Limits & Open Items
Power is unofficial: all efficiency ratios are derived indices; Apple hides TDP; third-party measures vary Β±20% by method/cooling/load.
M5/M6 are fresh: M5 Ultra (2026-08), M6 (2026-08/09) follow official first batches; M6 Pro/Max not yet released.
Synthetic benchmark: Geekbench 6 reflects CPU/general compute, not real apps (Final Cut, Blender, games) β bound by thermals and memory.
M3 Pro bandwidth trap: watch the 150 GB/s drop on 2023 MacBook Pro; prefer M3 Max for bandwidth-bound work.
10 Β· ColorOS 16 Control Center (demo)
A Flux-style glass control center β tap tiles to toggle. Pure showcase interaction.
πΆ
Wi-Fi
π΅
Bluetooth
βοΈ
Airplane
π
Dark Mode
π
Private Safe
π€
On-device AI
π
Location
π
Low Power
11 Β· Data Sources
Apple official: per-chip tech specs, newsroom (M1βM6), Mac mini Environmental Report (support.apple.com)
Wikipedia / Wikiwand: Apple M1, M2, M3, M4, M5, Apple silicon entries
Apple Silicon Compendium (slop.sus.cat): full-spec & Geekbench 6ζ±ζ»
J.D.Hodges "Every Apple CPU Compared: M1 Through M6": M5/M6 variants & scores
MacNerd / NotebookCheck / AnandTech: package power & efficiency estimates, M6 Mac mini tests